#include #include #include #include #define SYSCLK 10000000UL #define BAUDRATE 9600UL #define INIT_1 170 #define INIT_2 240 #define RET_COL 17 #define RET_RPM 34 #define TST_WHT 153 #define SET_COL 51 #define SET_RPM 68 #define SET_WHT 105 #define EXIT 210 volatile uint8_t Set_val, RpmH_col, RpmL_col, Rem_col; volatile uint8_t Knip_col, Acht_col, Gro_col, Alarm_col; volatile uint8_t RpmH_H, RpmH_L, RpmL_H, RpmL_L; volatile uint8_t W_Red, W_Grn, W_Blu; volatile uint16_t Inv_speed; void uart_put(char c) // Stuurt een byte naar de PC. { loop_until_bit_is_set(UCR, UDRE); UDR = c; } SIGNAL (SIG_INTERRUPT0) // Externe Interrupt 0 routine { Inv_speed = 256 * TCNT1H + TCNT1L; TCCR1B = _BV (CS11 & CS10); // Counter 1 -> Clock/64 } SIGNAL (SIG_OVERFLOW1) // Timer 1 overflow (RPM te laag) { TCCR1B = 0; // Counter stop TCNT1H = 255; // Hoogste waarde laden in TCNT1L = 255; // HIGH and LOW register. } SIGNAL (SIG_UART_RECV) // UART byte ontvangst interrupt. { if (!FE) // Als er geen error in de data zit: { switch (Set_val) // Set_val bevat de menu-item waarde // die verwacht wordt. { case 0: // Eerste controlebyte voor hoofdmenu switch (UDR) { case INIT_1: Set_val = 1; break; default: Set_val = 0; } goto quit; case 1: // Tweede controlebyte voor hoofdmenu switch (UDR) { case INIT_2: Set_val = 19; uart_put(Set_val); Set_val = 79; uart_put(Set_val); Set_val = 2; break; default: Set_val = 0; } goto quit; case 2: switch (UDR) { case RET_COL: uart_put(16 * RpmH_col + RpmL_col); uart_put(16 * Rem_col + Knip_col); uart_put(16 * Acht_col + Gro_col); uart_put(240 + Alarm_col); break; case RET_RPM: uart_put(RpmH_H); uart_put(RpmH_L); uart_put(RpmL_H); uart_put(RpmL_L); break; case TST_WHT: Set_val = 30; break; case SET_COL: Set_val = 40; break; case SET_RPM: Set_val = 50; break; case SET_WHT: Set_val = 60; break; case EXIT: default: Set_val = 0; } goto quit; case 30: W_Red = UDR; Set_val = 31; break; case 31: W_Grn = UDR; Set_val = 32; break; case 32: W_Blu = UDR; Set_val = 2; uart_put(255 - TST_WHT); break; case 40: RpmH_col = UDR / 16; RpmL_col = UDR % 16; Set_val = 41; break; case 41: Rem_col = UDR / 16; Knip_col = UDR % 16; Set_val = 42; break; case 42: Acht_col = UDR / 16; Gro_col = UDR % 16; Set_val = 43; break; case 43: Alarm_col = UDR % 16; Set_val = 2; break; } }/*else { //uart_put(07); //uart_put(05); }*/ quit: asm("nop"); } void IOinit(void) { Set_val = 0; UBRR = (SYSCLK / (16 * BAUDRATE)) - 1; // Set baudrate UCR = _BV (TXEN & RXEN & RXCIE); // tx enable, rx enable, rx interrupt enable TCCR0 = _BV (CS02); // Counter 0 -> Clock/256 TCCR1A = 0; // Compare off, PWM off. TCCR1B = _BV (CS11 & CS10); // Counter 1 -> Clock/64 TIMSK = _BV (TOIE1); // Overflow interrupt enable Counter 1 sei (); } int main (void) { IOinit(); for (;;) { while (Set_val == 0) { } } return(0); }